Publications

Mixed-signal INTegrated Circuit And System Lab.

2026

  • M. Song, Y. Hwang, and J. -E. Park, “A Fast-Transient Dual-Domain Learning Digital LDO with DroopTiming Prediction and Proactive Timing-Aware Control for Adaptive Droop Mitigation” 2026 IEEE Custom Integrated Circuits Conference (CICC), to be presented.
  • T. Lee, J. Kim and J. -E. Park, “A 430μA Auto-Correlated Host Sensing AFE for Host-Driving-Based Pairing Active Stylus Pen With Hovering Detection,” in IEEE Transactions on Circuits and Systems II: Express Briefs, Early Access
  • (Top-Tier) S. Moon, B. Yoo, M. Kim, J. Choi and J. -E. Park, “A Radiated-EMI-Reduced Touch AFE IC With Pipelined Dual-Frequency Modulation and Sine2 Waveform Shaping for Automotive Applications,” in IEEE Journal of Solid-State Circuits, Early Access

2025

  • (Top-Tier) J. Lee, Y. Lee, M. Song, Y. Hwang and J. -E. Park, “A 500 mA Output-Capacitorless NMOS LDO With Dynamic Load Range Adaptation Achieving Fast Settling Time and Enhanced PSR for Chiplet Power Managements,” in IEEE Transactions on Power Electronics, vol. 40, no. 10, pp. 14508-14523, Oct. 2025.
  • (Top-Tier) S. -W. Jung, Y. Hwang and J. -E. Park, “A Fully Integrated Switched-Capacitor Voltage Regulator With Switching-Aware Ripple Injection LDO Achieving up to 77% Ripple Reduction,” in IEEE Transactions on Power Electronics, vol. 40, no. 10, pp. 14318-14323, Oct. 2025.
  • (Top-Tier) Y. Hwang, M. Song, Y. Kwon, J. An and J. -E. Park, “A 0.6-to-1.1-V 2-A Dead-Zone-Based Dual-Loop Ring-Amplifier LDO for High-Current-Density Custom HBM Applications,” in IEEE Transactions on Power Electronics, vol. 40, no. 10, pp. 14282-14288, Oct. 2025.
  • (Top-Tier) M. Song, Y. Hwang, S. -W. Jung, T. Lee, S. Moon and J. -E. Park, “A Fast-Transient One-Shot Droop Recovery Digital LDO With Reinforcement-Learning Droop Compensation for D2D Interfaces,” in IEEE Transactions on Power Electronics, vol. 40, no. 10, pp. 14253-14258, Oct. 2025.
  • J. -W. Oh et al., “A 92.7% Peak Efficiency Self-Starting Boost Converter With MPPT and Phase Frequency Detector Based Multi Current Detector for Energy Harvesting Systems With a Minimum Input Source Impedance of 1 Ω,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 72, no. 9, pp. 5270-5283, Sept. 2025
  • Y. Kim, J. -E. Park, K. Park and Y. -H. Hwang, “A Compact Power-on-Reset Circuit With Configurable Brown-Out Detection,” in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 33, no. 7, pp. 2074-2078, July 2025.
  • S. -J. Lee et al., “A Design of a 100-MHz Fully Integrated Digital Pulse Width Modulation Three-Level Buck Converter Using Package Bond-Wire Inductor,” in IEEE Access, vol. 13, pp. 50032-50042, 2025.
  •  (Top-Tier) S. Moon, J. Choi and J. -E. Park, “A 10.5mW Automotive Touch AFE IC Featuring Radiated EMI Reduction Based on Pipelined Dual-Frequency Modulation and Sine2 Waveform Shaping for CISPR 25 Class 5 Compliance,” 2025 IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, USA, 2025, pp. 132-134

2024

  • (Top-Tier) J. Choi, I. Jeong, S. -W. Jung and J. -E. Park, “A 92.8% Power Reduction Event-Driven Dual-Mode Touch Analog Front-End IC Featuring 620μW Self-Capacitance Sensing and 500fps Mutual-Capacitance Sensing,” 2024 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), Honolulu, HI, USA, 2024, pp. 1-2
  • Y. Lee and J. -E. Park, “Analysis of Power-Supply-Rejection Enhancement Techniques for Low-Dropout Regulators,” in IEEE Access, vol. 12, pp. 59976-59995, 2024
  • D. Kim et al., “A Design of Analog PLL-Based Self-Calibrated Open-Loop FSK Modulator for BLE Advertising Transmitter,” in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 71, no. 8, pp. 3740-3744, Aug. 2024
  • I. Jeong and J. -E. Park, “X-PIM: Fast Modeling and Validation Framework for Mixed-Signal Processing-in-Memory Using Compressed Equivalent Model in System Verilog,” 2024 Design, Automation & Test in Europe Conference & Exhibition (DATE), Valencia, Spain, 2024, pp. 1-6
  • J. Oh, Y. Song, Y. -H. Hwang, J. -E. Park, M. Seok and D. -K. Jeong, “A Capacitorless External-Clock-Free Fully Synthesizable Digital LDO With Time-Based Load-State Decision and Asynchronous Recovery,” in IEEE Transactions on Power Electronics, vol. 39, no. 1, pp. 985-997, Jan. 2024

2023

  • J. Choi et al., “A 1.08ms Ultrafast Scanning Capacitive Touch-Screen Sensor Interface with Charge-Interpolated Common-Mode Compensation and Host-Based Adaptive Median Filtering,” 2023 IEEE Asian Solid-State Circuits Conference (A-SSCC), Haikou, China, 2023, pp. 1-3
  • Y. Lee and J. -E. Park, “Analysis of Power-Supply-Rejection Enhancement Techniques for Low-Dropout Regulators,” in IEEE Access, vol. 12, pp. 59976-59995, 2024
  • J. Lee and J. -E. Park, “Denoising Capacitive Touch Sensor Noise Network with U-Net Convolutional Neural Network,” 2023 IEEE International Conference on Consumer Electronics-Asia (ICCE-Asia), Busan, Korea, Republic of, 2023, pp. 1-4
  • I. Jeong and J. -E. Park, “A Modeling and Simulation of ReRAM with Nonidealities for System-Level PIM Validation in System Verilog,” 2023 IEEE International Conference on Consumer Electronics-Asia (ICCE-Asia), Busan, Korea, Republic of, 2023, pp. 1-4
  • Y. Lee and J. -E. Park, “A 43-fJ/Conv, 1-GS/s Energy-Efficient Charge-Steering Comparator with Floating-Inverter-Based Preamplifier in 40nm CMOS,” 2023 IEEE International Conference on Consumer Electronics-Asia (ICCE-Asia), Busan, Korea, Republic of, 2023, pp. 1-4
  • Y. -H. Hwang, J. Wang, D. -K. Jeong and J. -E. Park, “An Area/Power-Efficient ΔΣ Modulator Based on Dynamic-Boost Inverter for Multichannel Sensor Applications,” in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 31, no. 9, pp. 1403-1412, Sept. 2023

~ 2022

  • J. Oh, Y. Song, Y. -H. Hwang, J. -E. Park, M. Seok and D. -K. Jeong, “A 0.0043-mm2 Capacitorless External-Clock-Free Fully-Synthesizable Digital LDO Using Load-Direct Droop Detector and Time-Based Load-State Decision,” 2022 IEEE Asian Solid-State Circuits Conference (A-SSCC), Taipei, Taiwan, 2022, pp. 10-12
  • (Top-Tier) J. Oh, Y. -H. Hwang, J. -E. Park, M. Seok and D. -K. Jeong, “An Output-Capacitor-Free Synthesizable Digital LDO Using CMP-Triggered Oscillator and Droop Detector,” in IEEE Journal of Solid-State Circuits, vol. 58, no. 6, pp. 1769-1781, June 2023
  • Y. -H. Hwang, Y. Song, J. -E. Park and D. -K. Jeong, “A Fully Passive Noise-Shaping SAR ADC Utilizing Last-Bit Majority Voting and Cyclic Dynamic Element Matching Techniques,” in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 30, no. 10, pp. 1381-1390, Oct. 2022
  • (Top-Tier) Y. -H. Hwang, J. Oh, W. -S. Choi, D. -K. Jeong and J. -E. Park, “A Residue-Current-Locked Hybrid Low-Dropout Regulator Supporting Ultralow Dropout of Sub-50 mV With Fast Settling Time Below 10 ns,” in IEEE Journal of Solid-State Circuits, vol. 57, no. 7, pp. 2236-2249, July 2022
  • (Top-Tier) Y. Song, J. Oh, S. -Y. Cho, D. -K. Jeong and J. -E. Park, “A Fast Droop-Recovery Event-Driven Digital LDO With Adaptive Linear/Binary Two-Step Search for Voltage Regulation in Advanced Memory,” in IEEE Transactions on Power Electronics, vol. 37, no. 2, pp. 1189-1194, Feb. 2022
  • (Top-Tier) J. Oh, J. -E. Park, Y. -H. Hwang and D. -K. Jeong, “25.2 A 480mA Output-Capacitor-Free Synthesizable Digital LDO Using CMP- Triggered Oscillator and Droop Detector with 99.99% Current Efficiency, 1.3ns Response Time, and 9.8A/mm2 Current Density,” 2020 IEEE International Solid-State Circuits Conference – (ISSCC), San Francisco, CA, USA, 2020, pp. 382-384
  • (Top-Tier) J. -E. Park, J. Hwang, J. Oh and D. -K. Jeong, “32.4 A 0.4-to-1.2V 0.0057mm2 55fs-Transient-FoM Ring-Amplifier-Based Low-Dropout Regulator with Replica-Based PSR Enhancement,” 2020 IEEE International Solid-State Circuits Conference – (ISSCC), San Francisco, CA, USA, 2020, pp. 492-494
  • J. Oh, J. -E. Park and D. -K. Jeong, “A Highly Synthesizable 0.5-to-1.0-V Digital Low-Dropout Regulator With Adaptive Clocking and Incremental Regulation Scheme,” in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 67, no. 10, pp. 2174-2178, Oct. 2020
  • Y. -H. Hwang et al., “An Always-On 0.53-to-13.4 mW Power-Scalable Touchscreen Controller for Ultrathin Touchscreen Displays With Current-Mode Filter and Incremental Hybrid ΔΣ ADC,” ESSCIRC 2019 – IEEE 45th European Solid State Circuits Conference (ESSCIRC), Cracow, Poland, 2019, pp. 313-316
  • J. Park, Y. -H. Hwang, J. Oh, Y. Song, J. -E. Park and D. -K. Jeong, “A Compact Self-Capacitance Sensing Analog Front-End for a Touch Detection in Low-Power Mode,” 2019 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), Lausanne, Switzerland, 2019, pp. 1-6
  • J. -E. Park, Y. -H. Hwang and D. -K. Jeong, “A 0.5-V Fully Synthesizable SAR ADC for On-Chip Distributed Waveform Monitors,” in IEEE Access, vol. 7, pp. 63686-63697, 2019
  • (Top-Tier) J. Park, Y. -H. Hwang, J. Oh, Y. Song, J. -E. Park and D. -K. Jeong, “A Mutual Capacitance Touch Readout IC With 64% Reduced-Power Adiabatic Driving Over Heavily Coupled Touch Screen,” in IEEE Journal of Solid-State Circuits, vol. 54, no. 6, pp. 1694-1704, June 2019
  • (Top-Tier) J. -E. Park, J. Park, Y. -H. Hwang, J. Oh and D. -K. Jeong, “A Noise-Immunity-Enhanced Analog Front-End for 36×64 Touch-Screen Controllers With 20- VPP Noise Tolerance at 100 kHz,” in IEEE Journal of Solid-State Circuits, vol. 54, no. 5, pp. 1497-1510, May 2019
  • Y. -H. Hwang, Y. Song, J. -E. Park and D. -K. Jeong, “A 0.6-to-1V 10k-to-100kHz BW 11.7b-ENOB Noise-Shaping SAR ADC for IoT sensor applications in 28-nm CMOS,” 2018 IEEE Asian Solid-State Circuits Conference (A-SSCC), Tainan, Taiwan, 2018, pp. 247-248
  • Y. -H. Hwang, J. -E. Park, Y. Song and D. -K. Jeong, “A 20 k-to-100kS/s Sub- μ W 9.5b-ENOB Asynchronous SAR ADC for Energy-Harvesting Body Sensor Node SoCs in 0.18- μ m CMOS,” in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 65, no. 12, pp. 1814-1818, Dec. 2018
  • (Top-Tier) J. -E. Park and D. -K. Jeong, “A Fully Integrated 700mA Event-Driven Digital Low-Dropout Regulator with Residue-Tracking Loop for Fine-Grained Power Management Unit,” 2018 IEEE Symposium on VLSI Circuits, Honolulu, HI, USA, 2018, pp. 231-232
  • J. Park, Y. -H. Hwang, J. Oh, J. -E. Park and D. -K. Jeong, “Adiabatically driven touch controller analog front-end for ultra-thin displays,” 2018 IEEE Custom Integrated Circuits Conference (CICC), San Diego, CA, USA, 2018, pp. 1-4
  • Y. -H. Hwang, J. -E. Park and D. -K. Jeong, “A compact 87.1-dB DR bandwidth-scalable delta-sigma modulator based on dynamic gain-bandwidth-boosting inverter for audio applications,” 2017 IEEE Asian Solid-State Circuits Conference (A-SSCC), Seoul, Korea (South), 2017, pp. 293-296
  • J. -E. Park, Y. -H. Hwang and D. -K. Jeong, “A 0.4-to-1 V Voltage Scalable ΔΣ ADC With Two-Step Hybrid Integrator for IoT Sensor Applications in 65-nm LP CMOS,” in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 64, no. 12, pp. 1417-1421, Dec. 2017
  • J. Hwang et al., “A 32 Gb/s, 201 mW, MZM/EAM Cascode Push–Pull CML Driver in 65 nm CMOS,” in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 65, no. 4, pp. 436-440, April 2018
  • Y. Kim, G. -S. Jeong, J. -E. Park, J. Park, G. Kim and D. -K. Jeong, “20-Gb/s 5-VPP and 25-Gb/s 3.8-VPP Area-Efficient Modulator Drivers in 65-nm CMOS,” in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 63, no. 11, pp. 1034-1038, Nov. 2016
  • (Top-Tier) J. -E. Park, J. Park, Y. -H. Hwang, J. Oh and D. -K. Jeong, “11.6 A 100-TRX-channel configurable 85-to-385Hz-frame-rate analog front-end for touch controller with highly enhanced noise immunity of 20Vpp,” 2016 IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, USA, 2016, pp. 210-211
  • J. -E. Park, Y. Kim, S. Kim, G. Kim and D. -K. Jeong, “20-Gb/s 3.6-VPP-swing source-series-terminated driver with 2-Tap FFE in 65-nm CMOS,” 2015 IEEE International Symposium on Circuits and Systems (ISCAS), Lisbon, Portugal, 2015, pp. 2864-2867
  • Jiho Joo, Ki-Seok Jang, Sang Hoon Kim, In Gyoo Kim, Jin Hyuk Oh, Sun Ae Kim, Gyu-Seob Jeong, Yoonsoo Kim, Jun-Eun Park, Sungwoo Kim, Hankyu Chi, Deog-Kyoon Jeong, and Gyungock Kim, “Silicon photonic receiver and transmitter operating up to 36 Gb/s for λ~1550 nm,” Opt. Express 23, 12232-12243 (2015)
  • (Top-Tier) J. -E. Park, D. -H. Lim and D. -K. Jeong, “A Reconfigurable 40-to-67 dB SNR, 50-to-6400 Hz Frame-Rate, Column-Parallel Readout IC for Capacitive Touch-Screen Panels,” in IEEE Journal of Solid-State Circuits, vol. 49, no. 10, pp. 2305-2318, Oct. 2014,
  • J. -E. Park, D. -H. Lim and D. -K. Jeong, “A 6.3 mW high-SNR frame-rate scalable touch screen panel readout IC with column-parallel Σ-Δ ADC structure for mobile devices,” 2013 IEEE Asian Solid-State Circuits Conference (A-SSCC), Singapore, 2013, pp. 357-360
  • D. -H. Lim, J. -E. Park and D. -K. Jeong, “A low-noise differential front-end and its controller for capacitive touch screen panels,” 2012 Proceedings of the ESSCIRC (ESSCIRC), Bordeaux, France, 2012, pp. 237-240